A known principle in data processing is the practice of keeping special hardware ready which performs particular data operations, for example mathematical operations. This is used to relieve the load on the central processing unit (CPU). The requirement to have to interchange data between different units often arises in this connection. Data are typically transported from a first system to a second system, are processed there and are then transported back again from the second system to the first system. Special configurations of the systems determine the manner in which the data are transported. The data can be transported, for example, using a network or by means of direct memory access (DMA).
In order to be able to achieve a data processing speed which is as high as possible, the transport of data is organized in such a manner that it takes place in the background while the previously transmitted data are being processed. For this purpose, two memory areas are kept ready in the second system, the target system. While the data in one of the two memory areas are being processed, the next data to be processed are written to the other memory area.
These data are available for processing as soon as the processing of the data in the other memory area has been concluded. Since data are always available for processing, efficient use can be made of the processing means. In theory, pauses in which the processing means cannot operate because it has to wait for data do not arise. This presupposes, inter alia, that the data transmission medium has a sufficiently wide bandwidth. Such a method is known to a person skilled in art under the name double buffering.
IBM, CELL BROADBAND ENGINE—Programming Tutorial—Version 3.0 shows a double buffering method (see, for example, page 5 and page 87). The method describes the transport of data in one direction from the first system to the target system. It is necessary to implement a second double buffering method in order to transport the data which have already been processed back from the target system to the first system.
FIG. 1 shows an arrangement of memory areas for implementing a double buffering method in the target system 1, which allows bidirectional transport of data. For this purpose, four memory areas A, B, C, D of the same size are kept available in the target system 1. Two first memory areas A, B form the input buffer and implement a double buffering method for the input data stream. Two second memory areas C, D form the output buffer and implement a double buffering method for the data which have already been processed, the output data stream. In a first interval of time t1, data are received in a first memory area A of the input buffer A, B. This is symbolically indicated by a wedge which shows the filling of the memory area A over the interval of time t1. At the beginning of the interval of time t1, this memory area is empty and, towards the end of the interval of time t1, this memory area is filled with data. The data which have already been previously received in a second memory area B of the input buffer A, B are kept available in this second memory area B in the interval of time t1 for data processing. These data are processed by the target system 1 and the result data are stored in a second memory area D of the output buffer C, D in this first interval of time t1. At the end of the first interval of time t1, the result data is available in the second memory area D of the output buffer C, D. The memory areas B and D which are kept available for data processing in an interval of time t1 are each graphically illustrated using hatching. The emptying of the memory area C during the interval of time t1 is likewise symbolically illustrated by a wedge. At the beginning of the interval of time t1, this memory area is filled with data to be returned (result data from the processing by the target system 1 at a time interval before the interval t1) and, towards the end of the interval of time t1, the data from the memory area C have been returned. The illustrations which indicate the emptying and filling of the memory areas are graphically inverted (i.e., the black area in A corresponds to the white area in C, and the white area in A corresponds to the black area in C). In a second interval of time t2, the processed data from the second memory area D of the output buffer C, D are returned to the first data processing system not shown here. The first memory area C of the output buffer C, D is now available to receive the data processed in the second interval of time t2. In the second interval of time t2, the data which were received in a first memory area A in the first interval of time t1 and are awaiting processing are kept available in this memory area A in the input buffer A, B. The data from the input data stream are received in the second memory area B of the input buffer A, B in the second interval of time t2. In this method, a memory area for receiving data and a memory area containing data to be processed are thus respectively available in the input buffer A, B in each interval of time. A memory area for returning the data which have already been processed and a memory area for processing the data are respectively available in the output buffer C, D in each interval of time. In other words, in one interval of time, buffer A is for receiving data and buffer B is for containing data to be processed, and in the next interval of time, buffer B is for receiving data and buffer A is for containing data to be processed. Similarly, in one interval of time, buffer C is for returning data which have already been processed and buffer D is for processing the data, and in the next interval of time, buffer D is for receiving data which have already been processed and buffer C is for processing the data.